Degree Program in Computer Network and System Administration

SAS1610 Chapter 3

Home
Academic Plan
Spring 2007
Summer 2007
Fall 2007
Fall 2007 Calendar

 

Chapter 3 The Digital Logic Level

 

3.1 Gates and Boolean Algebra

3.1.1 Gates

3.1.2 Boolean Algebra

3.1.3 Implementation of Boolean Functions

3.1.4 Circuit Equibalance

 

3.2 Basic Digital Logic Circuits

3.2.1 Integrated Circuits

3.2.2 Combinational Circuits

3.2.3 Arithmetic Circuits

3.2.4 Clocks

 

3.3 Memory

3.3.1 Latches

3.3.2 Flip-Flops

3.3.3 Registers

3.3.4 Memory Organization

3.3.5 Memory Chips

3.3.6 RAMs and ROMs

 

3.4 CPU Chips and Buses

3.4.1 CPU Chips

3.4.2 Computer Buses

3.4.3 Bus Width

3.4.4 Bus Clocking

3.4.5 Bus Arbitration

3.4.6 Bus Operations

 

3.5 Example CPU Chips

3.5.1 The Pentium 4

3.5.2 The UltraSPARC III

3.5.3 The 8051

 

3.6 Example Buses

3.6.1 The ISA Bus

3.6.2 The PCI Bus

3.6.3 PCI Express

3.6.4 The Universal Serial Bus

 

3.7 Interfacing

3.7.1 I/O Chips

3.7.2 Address Decoding

 

3.8 Summary